 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| (R) ISL99201 Data Sheet February 27, 2009 FN6742.0 Filterless High Efficiency 1.5W Class D Mono Amplifier The ISL99201 is a fully integrated high efficiency class-D mono amplifier. It is designed to maximize performance for mobile phone applications. The application circuit requires a minimum requirement of external components and operates from a 2.4V to 5.5V input supply. It is capable of delivering 1.4W of continuous output power with less than 1% THD+N driving a 8 load from a 5V supply. The ISL99201 features a high-efficiency, low-noise modulation scheme. It operates with 86% efficiency at 400mW into 8 and has a signal-to-noise ratio (SNR) that is better than 95dB. The ISL99201 has a micro-power shutdown mode with a typical shutdown current of 200nA. Shutdown is enabled by applying a logic low to the SD pin. The architecture of the devices allows it to achieve very low level of pop-and-click. This minimizes voltage glitches at the output during turn-on and turn-off, thus reducing audible noise on activation and deactivation. The fully differential input of the ISL99201 provides excellent rejection of common mode noise on the input typically 75dB. EMI suppression is achieved by SRC (Slew Rate Control). The ISL99201 oscillator can be synchronized to an external clock through the SYNC input, allowing the switching frequency to be externally defined. The SYNC input also allows multiple ISL99201 to be cascaded and frequency locked; minimizing interference due to clock intermodulation. SYNC is available only in DFN version. The ISL99201 also has excellent rejection of power supply noise, including noise caused by GSM transmission bursts and RF rectification. PSRR is typically 75dB at 217Hz. There will be 4 versions of the part; they will consist of three fixed gain settings (6dB, 9.6dB, 12dB) and one user programmable gain setting (need external resistors). The ISL99201 has built-in thermal shutdown and output short-circuit protection. Features * Filterless Class D with Efficiency > 86% at 400mW * Click-Pop Suppression * Slew Rate Control * Spread Spectrum Switching * Optional SYNC Pin for Master/Slave Operation Without Interface (Only in TDFN) * 1.4W into 8 with Less than 1% THD+N * 2.4V to 5.5V Single Supply Voltage * Built-in Resistors to Reduce Board Component Count * Only One External Component Required (Fixed Gain Mode) * Short Circuit and Thermal Protection * Gain Programmable 6dB, 9.6dB, 12dB and User Programmable * Pb-Free (RoHS compliant) Applications * Mobile Phones * MP3 Players * Portable Gaming * Portable Electronics * Educational Toys 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2009. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL99201 Ordering Information PART NUMBER ISL99201IRTAZ-T (Notes 1, 2) PART MARKING 201A GAIN SETTING (dB) 6 6 9.6 9.6 12 12 Prog. Prog. 6 6 9.6 9.6 12 12 Prog. Prog. TEMP. RANGE (C) -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 -40 to +85 PACKAGE Tape & Reel (Pb-Free) 8 Ld 3x3 TDFN 8 Ld 3x3 TDFN 8 Ld 3x3 TDFN 8 Ld 3x3 TDFN 8 Ld 3x3 TDFN 8 Ld 3x3 TDFN 8 Ld 3x3 TDFN 8 Ld 3x3 TDFN 9 Ball WLCSP 9 Ball WLCSP 9 Ball WLCSP 9 Ball WLCSP 9 Ball WLCSP 9 Ball WLCSP 9 Ball WLCSP 9 Ball WLCSP PKG. DWG. # L8.3x3A L8.3x3A L8.3x3A L8.3x3A L8.3x3A L8.3x3A L8.3x3A L8.3x3A W3x3.9C W3x3.9C W3x3.9C W3x3.9C W3x3.9C W3x3.9C W3x3.9C W3x3.9C ISL99201IRTAZ-TK (Notes 1, 2) 201A ISL99201IRTBZ-T (Notes 1, 2) 201B ISL99201IRTBZ-TK (Notes 1, 2) 201B ISL99201IRTCZ-T (Notes 1, 2) 201C ISL99201IRTCZ-TK (Notes 1, 2) 201C ISL99201IRTDZ-T (Notes 1, 2) 201D ISL99201IRTDZ-TK (Notes 1, 2) 201D ISL99201IIAZ-T (Notes 1, 3, 4) 201A ISL99201IIAZ-TK (Notes 1, 3, 4) 201A ISL99201IIBZ-T (Notes 1, 3, 4) 201B ISL99201IIBZ-TK (Notes 1, 3, 4) 201B ISL99201IICZ-T (Notes 1, 3, 4) 201C ISL99201IICZ-TK (Notes 1, 3, 4) 201C ISL99201IIDZ-T (Notes 1, 3, 4) ISL99201IIDZ-TK (Notes 1, 3, 4) NOTES: 1. Please refer to TB347 for details on reel specifications. 201D 201D 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD020. 3. These Intersil Pb-free WLCSP and BGA packaged products employ special Pb-free material sets; molding compounds/die attach materials and SnAgCu - e1 solder ball terminals, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free WLCSP and BGA packaged products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 4. Please contact factory for ordering details. * 2 FN6742.0 February 27, 2009 ISL99201 Pinouts ISL99201 (8 LD TDFN) TOP VIEW SD 1 SYNC 2 IN+ 3 IN- 4 8 VO7 GND 3 6 VDD 5 VO+ 2 IN+ PVDD PGND INVDD OUT+ ISL99201 (9 BALL WLCSP) TOP VIEW 1 SD GND OUT - A B C 3 FN6742.0 February 27, 2009 ISL99201 Absolute Maximum Ratings (Reference to GND) Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VDD+0.3V Thermal Information Thermal Resistance (Typical Note 5) JA (C/W) WLCSP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 TDFN Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Maximum Junction Temperature (Plastic Package) -65C to +150C Maximum Storage Temperature Range . . . . . . . . . .-65C to +150C Power Dissipation Ratings 8 Ld 3x3 TDFN Derating Factor. . . . . . . . . . . . . . . . . . . . . . . . . . . . .21.8mW/C Power Ratings TA = +25C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.7W TA = +70C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.7W TA = +85C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.4W 9 Ball WLCSP Derating Factor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7.5mW/C Power Ratings TA = +25C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.01W TA = +70C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.67W TA = +85C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.56W Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Recommended Operating Conditions Ambient Temperature Range . . . . . . . . . . . . . . . . . . .-40C to +85C Operating Supply Voltage (VDD Pin) . . . . . . . . . . . . . . . 2.4V to 5.5V CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTE: 5. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with "direct attach" features. See Tech Brief TB379. Electrical Specifications Typical Values Are Tested at VDD = 5V and the Ambient Temperature at +25C. Parameters with MIN and/or MAX limits are 100% tested at +25C, unless otherwise specified. Temperature limits established by characterization and are not production tested. SYMBOL Po TEST CONDITIONS RL= 8, THD = 10%, f = 1kHz, 20kHz BW, VDD = 5.0V RL= 8, THD = 10%, f = 1kHz, 20kHz BW, VDD = 3.6V RL= 8, THD = 10%, f = 1kHz, 20kHz BW, VDD = 2.5V RL= 8, THD = 1%, f = 1kHz, 20kHz BW, VDD = 5.0V MIN TYP 1.4 0.75 0.4 1.15 90 0.05 0.05 0.09 -60 -60 300 375 0.2 450 5.0 MAX UNITS W W W W % % % % dB dB kHz mV PARAMETER Output Power . Efficiency Total Harmonic Distortion + Ratio THD+N POUT = 1.4W, 8 + 33H, VDD = 5.0V PO = 1W into 8 each channel, f = 1kHz, VDD = 5.0V PO = 0.5W into 8 each channel, f = 1kHz, VDD = 3.6V PO = 0.2W into 8 each channel, f = 1kHz, VDD = 3.6V Common-Mode Rejection Ratio CMRR VIC = 0.5V to (VDD - 0.8V); RL= 8, VDD = 2.5V to 5.5V CMRRGSM VCM = 2.5V 1VP-P at 217Hz, RL= 8 Average Switching Frequency Differential Output Offset Voltage POWER SUPPLY Supply Voltage Range Power Supply Rejection Ratio VDD PSRR VDD = 2.5V to 5.0V 2.4 fsw VOOS VDD= 5V G = 6dB; 9.6dB; 12dB; 28dB. 5.5 -65 -65 V dB dB PSRRGSM VRIPPLT = 100mVRMS at 217Hz (Input AC-Coupled with 2F capacitor) 4 FN6742.0 February 27, 2009 ISL99201 Electrical Specifications Typical Values Are Tested at VDD = 5V and the Ambient Temperature at +25C. Parameters with MIN and/or MAX limits are 100% tested at +25C, unless otherwise specified. Temperature limits established by characterization and are not production tested. (Continued) SYMBOL IIN TEST CONDITIONS VIN = 0V, No load, VDD = 5V VIN = 0V, No load, VDD = 3.6V VIN = 0V, 8 + 33H, VDD = 5V VIN = 0V, 8 + 33H, VDD = 3.6V ISD (Note 6) GAIN CONTROL Closed-Loop Gain D version user program ( Max Gain, Ri = 0) A version B version C version Differential Input Impedance ZIN SD = VDD, A version SD = VDD, B version SD = VDD, C version SD = VDD, D version, Ri = 2.5k SD = GND SHUTDOWN CONTROL Input Voltage High Input Voltage Low Turn-on Time Turn-off Time Output Impedance NOISE PERFORMANCE Output Voltage Noise En VDD = 3.6V, f = 20Hz to 20kHz, inputs are AC grounded, AV = 6dB, A-weighting VDD = 3.6V, f = 20Hz to 20kHz, inputs are AC grounded, AV 0 = 6dB, no weighting Signal-to-Noise Ratio NOTE: 6. Limits established by Characterization and are not production tested SNR POUT = 1W, RL= 8 27 35 102 V V dB VIH VIL tWU tSD ZOUT SD rising edge from GND to VDD SD falling edge from VDD to GND SD = GND 1.2 0.5 3.5 5 >100 V V ms s k 27.5 5.7 9.2 11.5 28.5 6 9.6 12 70 46.25 35 7.5 100 29.5 6.3 10 12.5 dB dB dB dB k k k k k SD = GND MIN TYP 3.9 3.2 3.9 3.8 0.2 0.4 3.75 MAX UNITS mA mA mA mA A PARAMETER Supply Current 5 FN6742.0 February 27, 2009 ISL99201 Pin Descriptions SD Shutdown Active Low. This signal is used to shut down and activate the part. It is 1.8V to 5V compatible. During shutdown, the part draws less than 100nA input current. Coming out of shutdown takes 3.5ms and going into shutdown is instantaneous. VO+ Positive BTL output. GND Ground (Analog ground in CSP) VDD Power Supply (Analog VDD in CSP) SYNC External clock input (available only in DFN). This pin allows the chip to be synchronized to a system clock. This helps in folding the spectral components and the switching harmonic out of band of interest. The range of SYNC frequency is from 250kHz to 800kHz. VONegative BTL output PVDD Power Supply (CSP only) PGND Power Ground (CSP only) IN+ Positive Differential Input. INNegative Differential Input. Block Diagram (Notes *) SD SHU TD O W N LO G IC CLICK A ND P O P S UPP RE SS IO N VD D S AW TO O TH G EN ER ATO R VDD SY NC 1 +180 + CO M P B IAS A ND RE FER EN CE - G A TE DR IV E W ITH SRC VO - IN+ + + + COMP + IN- O VE R C UR R EN T P R O TE C TIO N VDD G A TE D RIVE W ITH SR C VO+ G ND Notes: Gain = 6dB, 9.6dB, 12dB (gain setting) 140k ; with external resistor (Ri + 5k) *TDFN only Gain = 6 FN6742.0 February 27, 2009 ISL99201 Typical Performance Characteristics 100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 0 0.25 RL= 8 + 33H 0.50 0.75 1.00 1.25 OUTPUT POWER (W) 1.50 1.75 VDD= 5 V VDD = 3.6 V VDD = 2.5 V SUPPLY CURRENT (mA) 400 350 300 250 200 150 100 50 0 0 0.25 VDD = 5 V RL= 8 + 33H 1.50 1.75 VDD = 2.5 V VDD = 3.6 V 0.50 0.75 1.0 1.25 OUTPUT POWER (W) FIGURE 1. EFFICIENCY vs OUTPUT POWER FIGURE 2. SUPPLY CURRENT vs OUTPUT POWER TOTAL HARMONIC DISTORTION (%) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 2.5 RL= 8 + 33H 100 RL= 8 VDD = 5V 10 VDD = 3.6V VDD = 3V 1 VDD = 2.5V SUPPLY CURRENT (mA) RL= NO LOAD 0.10 3.0 3.5 4.0 4.5 5.0 INPUT SUPPLY (V) 5.5 6.0 0.01 0.01 0.10 1 OUTPUT POWER (W) 10 FIGURE 3. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 4. TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER -20 -30 CMRR (COMMON MODE REJECTION RATIO - dB) -40 -50 -60 -70 -80 -90 -100 10 100 1k FREQUENCY (Hz) 10k 100k VDD= 3.6V VIC = 1VP-P RL = 8 0.30 0.25 0.20 0.15 0.10 0.05 0 POWER DISSIPATION (W) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 OUTPUT POWER (W) 0.8 0.9 FIGURE 5. COMMON MODE REJECTION MODE vs FREQUENCY FIGURE 6. POWER DISSIPATION vs OUTPUT POWER 7 FN6742.0 February 27, 2009 ISL99201 Typical Performance Characteristics (Continued) 0.6 0.5 0.4 0.3 0.2 0.1 0 VDD = 5V RL = 8 OUTPUT POWER (W) 2.5 RL = 8 f = 1kHz 2.0 GAIN = 4V/V POWER DISSIPATION (W) 1.5 THD = 10% 1.0 THD = 1% 0.5 0 0.25 0.50 0.75 1.00 OUTPUT POWER (W) 1.25 1.50 0 2.5 3.0 4.0 3.5 SUPP L Y VOLTAGE (V) 4.5 5.0 FIGURE 7. POWER DISSIPATION vs OUTPUT POWER FIGURE 8. OUTPUT POWER vs SUPPLY VOLTAGE 10 TOTAL HARMONIC DISTORTION + NOISE (%) VDD = 2.5V RL = 8 TOTAL HARMONIC DISTORTION + NOISE (%) 10 VDD = 3.6V RL = 8 1 0.015W 0.075W 0.2W 1 0.125W 0.25W 0.5W 0.10 0.1 0.01 10 100 1k FREQUENCY (Hz) 10k 100k 0.01 10 100 1k FREQUENCY (Hz) 10k 100k FIGURE 9. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY FIGURE 10. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 10 VDD = 5V RL = 8 DISTORTION + NOISE (%) 1 -30 1W 0.5W 0.25W 0.125W 0.10 INPUTS AC-GROUNDED RL = 8 -40 CL = 2F ISL99201A -50 VDD = 2.5V -60 VDD = 3.6V -70 VDD = 5V 0.01 10 100 1k 10k FREQUENCY (Hz) 100k -80 10 100 1k FREQUENCY (Hz) 10k 100k FIGURE 11. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 8 SUPPLY RIPPLE REJECTION RATIO (dB) TOTAL HARMONIC FIGURE 12. SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY - ISL99201A FN6742.0 February 27, 2009 ISL99201 Typical Performance Characteristics (Continued) -30 INPUTS AC-GROUNDED RL = 8 -40 CL = 2F ISL99201B -50 VDD = 5V SUPPLY RIPPLE REJECTION RATIO (dB) -40 -30 INPUTS AC-GROUNDED RL = 8 CL = 2F ISL99201C VDD = 2.5V VDD = 5V SUPPLY RIPPLE REJECTION RATIO (dB) -50 -60 VDD = 3.6V VDD = 2.5V 100 1k FREQUENCY (Hz) 10k 100k -60 VDD = 3.6V -70 -70 -80 10 -80 10 100 1k FREQUENCY (Hz) 10k 100k FIGURE 13. SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY - ISL99201B FIGURE 14. SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY - ISL99201C -20 -30 40 -50 -60 -70 -80 VDD = 2.5V VDD = 5V INPUTS FLOATING RL = 8 CL = 2F ISL99201A -20 INPUTS FLOATING RL = 8 -30 C = 2F L ISL99201B -40 -50 -60 -70 -80 10 VDD = 2.5V SUPPLY RIPPLE REJECTION RATIO (dB) VDD = 3.6V SUPPLY RIPPLE REJECTION RATIO (dB) VDD = 5V VDD = 3.6V 10 100 1k FREQUENCY (Hz) 10k 100k 100 1k FREQUENCY (Hz) 10k 100k FIGURE 15. SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY - ISL99201A FIGURE 16. SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY - ISL99201B -20 -30 -40 -50 -60 -70 -80 INPUTS FLOATING RL = 8 CL = 2F ISL99201C VDD = 5V TOTAL HARMONIC REJECTION RATIO (%) 10 f = 1kHz PO = 200mW SUPPLY RIPPLE REJECTION RATIO (dB) VDD = 3.6V 1 0.1 2.5V 0.01 5V 3.6V VDD = 2.5V 10 100 1k FREQUENCY (Hz) 10k 100k 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 COMMON MODE INPUT VOLTAGE (V) 4.5 5.0 FIGURE 17. SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY - ISL99201C FIGURE 18. TOTAL HARMONIC DISTORTION + NOISE vs COMMON MODE INPUT VOLTAGE 9 FN6742.0 February 27, 2009 ISL99201 Typical Performance Characteristics (Continued) SUPPLY INPUT REJECTION RATIO (dB) 0 -10 COMMON MODE REJECTION RATIO (dB) -20 -30 -40 -50 -60 VDD = 3.6V VDD = 2.5V 0 -10 -20 -30 -40 -50 -60 -70 -80 0.25 VDD = 5V VDD = 3.6V VDD = 2.5V VDD = 5V -70 0.25 0.75 1.25 1.75 2.25 2.75 3.25 3.75 4.25 4.75 5.25 DC COMMON MODE VOLTAGE (V) 1.25 2.25 3.25 4.25 COMMON INPUT VOLTAGE (V) 5.25 FIGURE 19. SUPPLY RIPPLE REJECTION RATIO vs DC COMMON MODE VOLTAGE FIGURE 20. COMMON MODE REJECTION RATIO vs COMMON MODE INPUT VOLTAGE Typical Applications VDD DIFFERENTIAL INPUT SYNC SAWTOOTH GENERATOR C3 ZIN RI RI RI, REV D VINVIN+ + PWM H-BRIDGE POWER STAGE AND SR CONTROL VO+ VO- ZIN SD BIAS AND REFERENCE GND FIGURE 21. TYPICAL CIRCUIT WITH DIFFERENTIAL INPUT VDD SYNC DIFFERENTIAL INPUT ZIN RI RI VINZIN RI, REV D BIAS AND REFERENCE SAWTOOTH GENERATOR C3 VIN+ + PWM H-BRIDGE POWER STAGE AND SR CONTROL VO+ VO- SD GND FIGURE 22. TYPICAL CIRCUIT WITH DIFFERENTIAL INPUT AND INPUT CAPACITORS 10 FN6742.0 February 27, 2009 ISL99201 Typical Applications (Continued) VDD SYNC DIFFERENTIAL INPUT ZIN C1 C2 RI RI VINRI, REV D VIN+ + PWM H-BRIDGE POWER STAGE AND SR CONTROL SAWTOOTH GENERATOR C3 VO+ VO- SD BIAS AND REFERENCE GND FIGURE 23. TYPICAL CIRCUIT WITH SINGLE-ENDED INPUT 11 FN6742.0 February 27, 2009 ISL99201 Wafer Level Chip Scale Package (WLCSP 0.4mm Ball Pitch) E W3x3.9C 3x3 ARRAY 9 BALL WAFER LEVEL CHIP SCALE PACKAGE SYMBOL A A1 A2 D MILLIMETERS 0.445 Min, 0.495 Nom, 0.545 Max 0.190 0.025 0.305 0.025 0.270 0.030 1.315 0.020 0.800 BASIC 1.535 0.020 0.800 BASIC 0.400 BASIC 0 BASIC 0 BASIC Number of Bumps: 9 Rev. 0 5/08 b D PIN 1 INDEX AREA D1 E TOP VIEW E1 e SD SE A2 A A1 b NOTES: 1. Dimensions are in Millimeters. SIDE VIEW E1 SD SE 3 e 2 1 D1 C B A b BOTTOM VIEW 12 FN6742.0 February 27, 2009 ISL99201 Thin Dual Flat No-Lead Plastic Package (TDFN) Dual Flat No - Lead Plastic package (DFN) 2X 0.15 C A A D 2X 0.15 C B L8.3x3A 8 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE MILLIMETERS SYMBOL A A1 MIN 0.70 NOMINAL 0.75 0.02 0.20 REF 0.25 0.30 3.00 BSC 2.20 2.30 3.00 BSC 1.40 1.50 0.65 BSC 0.25 0.20 0.30 8 4 0.40 1.60 2.40 0.35 MAX 0.80 0.05 NOTES 5, 8 7, 8, 9 7, 8, 9 8 2 3 Rev. 3 11/04 NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. 2. N is the number of terminals. E 6 INDEX AREA TOP VIEW B A3 b D D2 E // 0.10 C 0.08 C E2 e k L N Nd A C SEATING PLANE SIDE VIEW A3 D2 (DATUM B) 1 2 D2/2 7 8 6 INDEX AREA (DATUM A) NX k E2 E2/2 3. Nd refers to the number of terminals on D. 4. All dimensions are in millimeters. Angles are in degrees. 5. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 7. Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance. NX L N 8 N-1 e 5 (Nd-1)Xe REF. BOTTOM VIEW C L NX (b) 5 SECTION "C-C" TERMINAL TIP FOR EVEN TERMINAL/SIDE e (A1) L1 10 L 0.10 M C A B NX b 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. 9. Compliant to JEDEC MO-WEEC-2 except for the "L" min dimension. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 13 FN6742.0 February 27, 2009 |
Price & Availability of ISL99201IICZ-T
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |